Bonaire North Shore

Patents

You can find the latest list of issued patents in the United States at USPTO. Below is the list as of January 2013.
CountryNumberTitle
USA 8,302,043 Verification of logic circuit designs using dynamic clock gating
USA 8,229,989 Method for controlling rounding modes in single instruction multiple data (SIMD) floating-point units
USA 8,166,085 Reducing the latency of sum-addressed shifters
USA 8,108,197 Method to verify an implemented coherency algorithm of a multi processor environment
USA 8,041,894 Method and system for a multi-level virtual/real cache system with synonym resolution
USA 8,015,451 Controlling an unreliable data transfer in a data channel
USA 8,015,362 Method and system for handling cache coherency for self-modifying code
USA 8,001,411 Generating a local clock domain using dynamic controls
USA 7,987,384 Method, system, and computer program product for handling errors in a cache without processor core recovery
USA 7,949,968 Method and system for building binary decision diagrams optimally for nodes in a netlist graph using don't-caring
USA 7,890,903 Method and system for formal verification of an electronic circuit design
USA 7,853,917 System for building binary decision diagrams efficiently in a structural network representation of a digital circuit
USA 7,836,413 Building binary decision diagrams efficiently in a structural network representation of a digital circuit
USA 7,752,583 System for verification of digital designs using case-splitting via constrained internal signals
USA 7,739,635 Conjunctive BDD building and variable quantification using case-splitting
USA 7,506,290 Method and system for case-splitting on nodes in a symbolic simulation framework
USA 7,475,371 Method and system for case-splitting on nodes in a symbolic simulation framework
USA 7,461,117 Floating point unit with fused multiply add and method for calculating a result with a floating point unit
USA 7,458,048 Computer program product for verification of digital designs using case-splitting via constrained internal signals
USA 7,447,725 Apparatus for controlling rounding modes in single instruction multiple data (SIMD) floating-point units
USA 7,392,270 Apparatus and method for reducing the latency of sum-addressed shifters
USA 7,367,001 Method, system and computer program product for verification of digital designs using case-splitting via constrained internal signals
USA 7,363,603 Method and system for case-splitting on nodes in a symbolic simulation framework
USA 7,340,704 Method and system for optimized automated case-splitting via constraints in a symbolic simulation framework
USA 7,340,473 Method and system for building binary decision diagrams efficiently in a structural network representation of a digital circuit
USA 7,302,656 Method and system for performing functional verification of logic circuits
USA 7,290,229 Method and system for optimized handling of constraints during symbolic simulation
USA 7,245,159 Protecting one-hot logic against short-circuits during power-on
China ZL200510065294.7 Apparatus And Method For Reducing The Latency Of Sum-Addressed Shifters
China ZL200510120127.8 Apparatus For Controlling Rounding Modes In Single Instruction Multiple Data (SIMD) Floating-Point Units